Actually delete InitSNES.asm.
This commit is contained in:
Colin McMillen
parent
ace9287755
commit
e6a3fd7578
256
InitSNES.asm
256
InitSNES.asm
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;------------------------------------------------------------------------
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;- Standard SNES initialization routine, originally by Neviksti
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;------------------------------------------------------------------------
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.MACRO InitializeSNES
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sei ;disable interrupts
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clc ;switch to native mode
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xce
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REP #$38 ; mem/A = 16 bit, X/Y = 16 bit
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;decimal mode off
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LDX #$1FFF ;Setup the stack
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TXS ;Transfer Index X to Stack Pointer Register
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;do the rest of the initialization in a routine
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JSL $008000
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SEP #$20 ; mem/A = 8 bit
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.ENDM
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;----------------------------------------------------------------------------
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.BANK 0 SLOT 0
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.ORG 0
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.SECTION "InitializeSNESCode" FORCE
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InitializeSNES:
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PHK ;set Data Bank = Program Bank
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PLB
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LDA #$0000 ;set Direct Page = $0000
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TCD ;Transfer Accumulator to Direct Register
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LDX $1FFD ;we clear all the mem at one point ...
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STX $4372 ;so save the return address in a place that won't get overwritten
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LDX $1FFF
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STX $4374
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SEP #$20 ; mem/A = 8 bit
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REP #$10
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LDA #$8F
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STA $2100 ;turn screen off for now, set brightness to normal
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LDX #$2101
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_Loop00: ;regs $2101-$210C
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STZ $00,X ;set Sprite,Character,Tile sizes to lowest, and set addresses to $0000
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INX
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CPX #$210D
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BNE _Loop00
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_Loop01: ;regs $210D-$2114
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STZ $00,X ;Set all BG scroll values to $0000
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STZ $00,X
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INX
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CPX #$2115
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BNE _Loop01
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LDA #$80 ;reg $2115
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STA $2115 ; Initialize VRAM transfer mode to word-access, increment by 1
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STZ $2116 ;regs $2117-$2117
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STZ $2117 ;VRAM address = $0000
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;reg $2118-$2119
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;VRAM write register... don't need to initialize
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STZ $211A ;clear Mode7 setting
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LDX #$211B
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_Loop02: ;regs $211B-$2120
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STZ $00,X ;clear out the Mode7 matrix values
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STZ $00,X
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INX
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CPX #$2121
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BNE _Loop02
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;reg $2121 - Color address, doesn't need initilaizing
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;reg $2122 - Color data, is initialized later
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LDX #$2123
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_Loop03: ;regs $2123-$2133
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STZ $00,X ;turn off windows, main screens, sub screens, color addition,
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INX ;fixed color = $00, no super-impose (external synchronization),
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CPX #$2134 ;no interlaced mode, normal resolution
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BNE _Loop03
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;regs $2134-$2136 - multiplication result, no initialization needed
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;reg $2137 - software H/V latch, no initialization needed
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;reg $2138 - Sprite data read, no initialization needed
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;regs $2139-$213A - VRAM data read, no initialization needed
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;reg $213B - Color RAM data read, no initialization needed
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;regs $213C-$213D - H/V latched data read, no initialization needed
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STZ $213E ;reg $213E - might not be necesary, but selects PPU master/slave mode
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;reg $213F - PPU status flag, no initialization needed
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;reg $2140-$2143 - APU communication regs, no initialization required
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;reg $2180 - read/write WRAM register, no initialization required
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;reg $2181-$2183 - WRAM address, no initialization required
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;reg $4016-$4017 - serial JoyPad read registers, no need to initialize
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STZ $4200 ;reg $4200 - disable timers, NMI,and auto-joyread
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LDA #$FF
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STA $4201 ;reg $4201 - programmable I/O write port, initalize to allow reading at in-port
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;regs $4202-$4203 - multiplication registers, no initialization required
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;regs $4204-$4206 - division registers, no initialization required
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;regs $4207-$4208 - Horizontal-IRQ timer setting, since we disabled this, it is OK to not init
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;regs $4209-$420A - Vertical-IRQ timer setting, since we disabled this, it is OK to not init
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STZ $420B ;reg $420B - turn off all general DMA channels
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STZ $420C ;reg $420C - turn off all H-MA channels
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STZ $420D ;reg $420D - ROM access time to slow (2.68Mhz)
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LDA $4210 ;reg $4210 - NMI status, reading resets
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;reg $4211 - IRQ status, no need to initialize
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;reg $4212 - H/V blank and JoyRead status, no need to initialize
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;reg $4213 - programmable I/O inport, no need to initialize
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;reg $4214-$4215 - divide results, no need to initialize
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;reg $4216-$4217 - multiplication or remainder results, no need to initialize
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;regs $4218-$421f - JoyPad read registers, no need to initialize
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;regs $4300-$437F
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;no need to intialize because DMA was disabled above
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;also, we're not sure what all of the registers do, so it is better to leave them at
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;their reset state value
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JSR ClearVRAM ;Reset VRAM
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JSR ClearPalette ;Reset colors
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;**** clear Sprite tables ********
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STZ $2102 ;sprites initialized to be off the screen, palette 0, character 0
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STZ $2103
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LDX #$0080
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LDA #$F0
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_Loop08:
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STA $2104 ;set X = 240
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STA $2104 ;set Y = 240
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STZ $2104 ;set character = $00
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STZ $2104 ;set priority=0, no flips
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DEX
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BNE _Loop08
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LDX #$0020
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_Loop09:
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STZ $2104 ;set size bit=0, x MSB = 0
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DEX
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BNE _Loop09
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;**** clear WRAM ********
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STZ $2181 ;set WRAM address to $000000
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STZ $2182
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STZ $2183
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LDX #$8008
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STX $4300 ;Set DMA mode to fixed source, BYTE to $2180
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LDX #wram_fill_byte
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STX $4302 ;Set source offset
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LDA #:wram_fill_byte
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STA $4304 ;Set source bank
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LDX #$0000
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STX $4305 ;Set transfer size to 64k bytes
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LDA #$01
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STA $420B ;Initiate transfer
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LDA #$01 ;now set the next 64k bytes
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STA $420B ;Initiate transfer
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PHK ;make sure Data Bank = Program Bank
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PLB
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CLI ;enable interrupts again
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LDX $4372 ;get our return address...
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STX $1FFD
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LDA $4374
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STA $1FFF
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RTL
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wram_fill_byte:
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.db $00
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;----------------------------------------------------------------------------
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; ClearVRAM -- Sets every byte of VRAM to zero
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; In: None
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; Out: None
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; Modifies: flags
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;----------------------------------------------------------------------------
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ClearVRAM:
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pha
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phx
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php
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REP #$30 ; mem/A = 8 bit, X/Y = 16 bit
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SEP #$20
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LDA #$80
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STA $2115 ;Set VRAM port to word access
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LDX #$1809
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STX $4300 ;Set DMA mode to fixed source, WORD to $2118/9
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LDX #$0000
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STX $2116 ;Set VRAM port address to $0000
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STX $0000 ;Set $00:0000 to $0000 (assumes scratchpad ram)
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STX $4302 ;Set source address to $xx:0000
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LDA #$00
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STA $4304 ;Set source bank to $00
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LDX #$FFFF
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STX $4305 ;Set transfer size to 64k-1 bytes
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LDA #$01
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STA $420B ;Initiate transfer
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STZ $2119 ;clear the last byte of the VRAM
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plp
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plx
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pla
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RTS
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;----------------------------------------------------------------------------
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; ClearPalette -- Reset all palette colors to zero
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; In: None
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; Out: None
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; Modifies: flags
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;----------------------------------------------------------------------------
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ClearPalette:
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PHX
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PHP
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REP #$30 ; mem/A = 8 bit, X/Y = 16 bit
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SEP #$20
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STZ $2121
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LDX #$0100
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ClearPaletteLoop:
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STZ $2122
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STZ $2122
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DEX
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BNE ClearPaletteLoop
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PLP
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PLX
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RTS
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.ENDS
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